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1 : //===---- TargetInfo.cpp - Encapsulate target details -----------*- C++ -*-===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : // These classes wrap the information about a call or function
11 : // definition used to handle ABI compliancy.
12 : //
13 : //===----------------------------------------------------------------------===//
14 :
15 : #include "TargetInfo.h"
16 : #include "ABIInfo.h"
17 : #include "CodeGenFunction.h"
18 : #include "clang/AST/RecordLayout.h"
19 : #include "llvm/Type.h"
20 : #include "llvm/ADT/StringExtras.h"
21 : #include "llvm/ADT/Triple.h"
22 : #include "llvm/Support/raw_ostream.h"
23 : using namespace clang;
24 : using namespace CodeGen;
25 :
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26 0: ABIInfo::~ABIInfo() {}
27 :
28 0: void ABIArgInfo::dump() const {
29 0: llvm::raw_ostream &OS = llvm::errs();
30 0: OS << "(ABIArgInfo Kind=";
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31 0: switch (TheKind) {
32 : case Direct:
33 0: OS << "Direct";
34 0: break;
35 : case Extend:
36 0: OS << "Extend";
37 0: break;
38 : case Ignore:
39 0: OS << "Ignore";
40 0: break;
41 : case Coerce:
42 0: OS << "Coerce Type=";
43 0: getCoerceToType()->print(OS);
44 0: break;
45 : case Indirect:
46 0: OS << "Indirect Align=" << getIndirectAlign();
47 0: break;
48 : case Expand:
49 0: OS << "Expand";
50 : break;
51 : }
52 0: OS << ")\n";
53 0: }
54 :
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55 0: TargetCodeGenInfo::~TargetCodeGenInfo() { delete Info; }
56 :
57 : static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays);
58 :
59 : /// isEmptyField - Return true iff a the field is "empty", that is it
60 : /// is an unnamed bit-field or an (array of) empty record(s).
61 : static bool isEmptyField(ASTContext &Context, const FieldDecl *FD,
62 157: bool AllowArrays) {
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63 157: if (FD->isUnnamedBitfield())
64 19: return true;
65 :
66 138: QualType FT = FD->getType();
67 :
68 : // Constant arrays of empty records count as empty, strip them off.
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69 138: if (AllowArrays)
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70 146: while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT))
71 17: FT = AT->getElementType();
72 :
73 138: return isEmptyRecord(Context, FT, AllowArrays);
74 : }
75 :
76 : /// isEmptyRecord - Return true iff a structure contains only empty
77 : /// fields. Note that a structure with a flexible array member is not
78 : /// considered empty.
79 198: static bool isEmptyRecord(ASTContext &Context, QualType T, bool AllowArrays) {
80 198: const RecordType *RT = T->getAs<RecordType>();
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81 198: if (!RT)
82 119: return 0;
83 79: const RecordDecl *RD = RT->getDecl();
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84 79: if (RD->hasFlexibleArrayMember())
85 0: return false;
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86 107: for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
87 : i != e; ++i)
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88 78: if (!isEmptyField(Context, *i, AllowArrays))
89 50: return false;
90 29: return true;
91 : }
92 :
93 : /// hasNonTrivialDestructorOrCopyConstructor - Determine if a type has either
94 : /// a non-trivial destructor or a non-trivial copy constructor.
95 330: static bool hasNonTrivialDestructorOrCopyConstructor(const RecordType *RT) {
96 330: const CXXRecordDecl *RD = dyn_cast<CXXRecordDecl>(RT->getDecl());
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97 330: if (!RD)
98 140: return false;
99 :
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100 190: return !RD->hasTrivialDestructor() || !RD->hasTrivialCopyConstructor();
101 : }
102 :
103 : /// isRecordWithNonTrivialDestructorOrCopyConstructor - Determine if a type is
104 : /// a record type with either a non-trivial destructor or a non-trivial copy
105 : /// constructor.
106 37: static bool isRecordWithNonTrivialDestructorOrCopyConstructor(QualType T) {
107 37: const RecordType *RT = T->getAs<RecordType>();
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108 37: if (!RT)
109 13: return false;
110 :
111 24: return hasNonTrivialDestructorOrCopyConstructor(RT);
112 : }
113 :
114 : /// isSingleElementStruct - Determine if a structure is a "single
115 : /// element struct", i.e. it has exactly one non-empty field or
116 : /// exactly one field which is itself a single element
117 : /// struct. Structures with flexible array members are never
118 : /// considered single element structs.
119 : ///
120 : /// \return The field declaration for the single non-empty field, if
121 : /// it exists.
122 43: static const Type *isSingleElementStruct(QualType T, ASTContext &Context) {
123 43: const RecordType *RT = T->getAsStructureType();
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124 43: if (!RT)
125 10: return 0;
126 :
127 33: const RecordDecl *RD = RT->getDecl();
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128 33: if (RD->hasFlexibleArrayMember())
129 0: return 0;
130 :
131 33: const Type *Found = 0;
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132 71: for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
133 : i != e; ++i) {
134 51: const FieldDecl *FD = *i;
135 51: QualType FT = FD->getType();
136 :
137 : // Ignore empty fields.
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138 51: if (isEmptyField(Context, FD, true))
139 10: continue;
140 :
141 : // If we already found an element then this isn't a single-element
142 : // struct.
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143 41: if (Found)
144 10: return 0;
145 :
146 : // Treat single element arrays as the element.
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147 4: while (const ConstantArrayType *AT = Context.getAsConstantArrayType(FT)) {
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148 5: if (AT->getSize().getZExtValue() != 1)
149 1: break;
150 4: FT = AT->getElementType();
151 : }
152 :
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153 31: if (!CodeGenFunction::hasAggregateLLVMType(FT)) {
154 27: Found = FT.getTypePtr();
155 : } else {
156 4: Found = isSingleElementStruct(FT, Context);
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157 4: if (!Found)
158 3: return 0;
159 : }
160 : }
161 :
162 20: return Found;
163 : }
164 :
165 49: static bool is32Or64BitBasicType(QualType Ty, ASTContext &Context) {
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166 49: if (!Ty->getAs<BuiltinType>() && !Ty->isAnyPointerType() &&
167 : !Ty->isAnyComplexType() && !Ty->isEnumeralType() &&
168 : !Ty->isBlockPointerType())
169 4: return false;
170 :
171 45: uint64_t Size = Context.getTypeSize(Ty);
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172 45: return Size == 32 || Size == 64;
173 : }
174 :
175 : /// canExpandIndirectArgument - Test whether an argument type which is to be
176 : /// passed indirectly (on the stack) would have the equivalent layout if it was
177 : /// expanded into separate arguments. If so, we prefer to do the latter to avoid
178 : /// inhibiting optimizations.
179 : ///
180 : // FIXME: This predicate is missing many cases, currently it just follows
181 : // llvm-gcc (checks that all fields are 32-bit or 64-bit primitive types). We
182 : // should probably make this smarter, or better yet make the LLVM backend
183 : // capable of handling it.
184 79: static bool canExpandIndirectArgument(QualType Ty, ASTContext &Context) {
185 : // We can only expand structure types.
186 79: const RecordType *RT = Ty->getAs<RecordType>();
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187 79: if (!RT)
188 13: return false;
189 :
190 : // We can only expand (C) structures.
191 : //
192 : // FIXME: This needs to be generalized to handle classes as well.
193 66: const RecordDecl *RD = RT->getDecl();
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194 66: if (!RD->isStruct() || isa<CXXRecordDecl>(RD))
195 42: return false;
196 :
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197 68: for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
198 : i != e; ++i) {
199 49: const FieldDecl *FD = *i;
200 :
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201 49: if (!is32Or64BitBasicType(FD->getType(), Context))
202 4: return false;
203 :
204 : // FIXME: Reject bit-fields wholesale; there are two problems, we don't know
205 : // how to expand them yet, and the predicate for telling if a bitfield still
206 : // counts as "basic" is more complicated than what we were doing previously.
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207 45: if (FD->isBitField())
208 1: return false;
209 : }
210 :
211 19: return true;
212 : }
213 :
214 1: static bool typeContainsSSEVector(const RecordDecl *RD, ASTContext &Context) {
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215 1: for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
216 : i != e; ++i) {
217 1: const FieldDecl *FD = *i;
218 :
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219 1: if (FD->getType()->isVectorType() &&
220 : Context.getTypeSize(FD->getType()) >= 128)
221 1: return true;
222 :
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223 0: if (const RecordType* RT = FD->getType()->getAs<RecordType>())
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224 0: if (typeContainsSSEVector(RT->getDecl(), Context))
225 0: return true;
226 : }
227 :
228 0: return false;
229 : }
230 :
231 : namespace {
232 : /// DefaultABIInfo - The default implementation for ABI specific
233 : /// details. This implementation provides information which results in
234 : /// self-consistent and sensible LLVM IR generation, but does not
235 : /// conform to any particular ABI.
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236 9: class DefaultABIInfo : public ABIInfo {
237 : ABIArgInfo classifyReturnType(QualType RetTy,
238 : ASTContext &Context,
239 : llvm::LLVMContext &VMContext) const;
240 :
241 : ABIArgInfo classifyArgumentType(QualType RetTy,
242 : ASTContext &Context,
243 : llvm::LLVMContext &VMContext) const;
244 :
245 : virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context,
246 21: llvm::LLVMContext &VMContext) const {
247 : FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context,
248 21: VMContext);
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249 41: for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
250 : it != ie; ++it)
251 20: it->info = classifyArgumentType(it->type, Context, VMContext);
252 21: }
253 :
254 : virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
255 : CodeGenFunction &CGF) const;
256 : };
257 :
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258 0: class DefaultTargetCodeGenInfo : public TargetCodeGenInfo {
259 : public:
260 9: DefaultTargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {}
261 : };
262 :
263 : llvm::Value *DefaultABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
264 0: CodeGenFunction &CGF) const {
265 0: return 0;
266 : }
267 :
268 : ABIArgInfo DefaultABIInfo::classifyArgumentType(QualType Ty,
269 : ASTContext &Context,
270 20: llvm::LLVMContext &VMContext) const {
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271 20: if (CodeGenFunction::hasAggregateLLVMType(Ty)) {
272 12: return ABIArgInfo::getIndirect(0);
273 : } else {
274 : // Treat an enum type as its underlying type.
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275 8: if (const EnumType *EnumTy = Ty->getAs<EnumType>())
276 0: Ty = EnumTy->getDecl()->getIntegerType();
277 :
278 : return (Ty->isPromotableIntegerType() ?
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279 8: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
280 : }
281 : }
282 :
283 : /// X86_32ABIInfo - The X86-32 ABI information.
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284 0: class X86_32ABIInfo : public ABIInfo {
285 : ASTContext &Context;
286 : bool IsDarwinVectorABI;
287 : bool IsSmallStructInRegABI;
288 :
289 49: static bool isRegisterSize(unsigned Size) {
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290 49: return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
291 : }
292 :
293 : static bool shouldReturnTypeInRegister(QualType Ty, ASTContext &Context);
294 :
295 : static unsigned getIndirectArgumentAlignment(QualType Ty,
296 : ASTContext &Context);
297 :
298 : public:
299 : ABIArgInfo classifyReturnType(QualType RetTy,
300 : ASTContext &Context,
301 : llvm::LLVMContext &VMContext) const;
302 :
303 : ABIArgInfo classifyArgumentType(QualType RetTy,
304 : ASTContext &Context,
305 : llvm::LLVMContext &VMContext) const;
306 :
307 : virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context,
308 1743: llvm::LLVMContext &VMContext) const {
309 : FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context,
310 1743: VMContext);
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311 4061: for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
312 : it != ie; ++it)
313 2318: it->info = classifyArgumentType(it->type, Context, VMContext);
314 1743: }
315 :
316 : virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
317 : CodeGenFunction &CGF) const;
318 :
319 474: X86_32ABIInfo(ASTContext &Context, bool d, bool p)
320 : : ABIInfo(), Context(Context), IsDarwinVectorABI(d),
321 474: IsSmallStructInRegABI(p) {}
322 : };
323 :
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324 0: class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
325 : public:
326 474: X86_32TargetCodeGenInfo(ASTContext &Context, bool d, bool p)
327 474: :TargetCodeGenInfo(new X86_32ABIInfo(Context, d, p)) {}
328 : };
329 :
330 : }
331 :
332 : /// shouldReturnTypeInRegister - Determine if the given type should be
333 : /// passed in a register (for the Darwin ABI).
334 : bool X86_32ABIInfo::shouldReturnTypeInRegister(QualType Ty,
335 49: ASTContext &Context) {
336 49: uint64_t Size = Context.getTypeSize(Ty);
337 :
338 : // Type must be register sized.
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339 49: if (!isRegisterSize(Size))
340 4: return false;
341 :
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342 45: if (Ty->isVectorType()) {
343 : // 64- and 128- bit vectors inside structures are not returned in
344 : // registers.
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345 0: if (Size == 64 || Size == 128)
346 0: return false;
347 :
348 0: return true;
349 : }
350 :
351 : // If this is a builtin, pointer, enum, or complex type, it is ok.
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352 45: if (Ty->getAs<BuiltinType>() || Ty->isAnyPointerType() ||
353 : Ty->isAnyComplexType() || Ty->isEnumeralType() ||
354 : Ty->isBlockPointerType())
355 28: return true;
356 :
357 : // Arrays are treated like records.
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358 17: if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty))
359 0: return shouldReturnTypeInRegister(AT->getElementType(), Context);
360 :
361 : // Otherwise, it must be a record type.
362 17: const RecordType *RT = Ty->getAs<RecordType>();
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363 17: if (!RT) return false;
364 :
365 : // FIXME: Traverse bases here too.
366 :
367 : // Structure types are passed in register if all fields would be
368 : // passed in a register.
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369 59: for (RecordDecl::field_iterator i = RT->getDecl()->field_begin(),
370 16: e = RT->getDecl()->field_end(); i != e; ++i) {
371 28: const FieldDecl *FD = *i;
372 :
373 : // Empty fields are ignored.
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374 28: if (isEmptyField(Context, FD, true))
375 3: continue;
376 :
377 : // Check fields recursively.
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378 25: if (!shouldReturnTypeInRegister(FD->getType(), Context))
379 1: return false;
380 : }
381 :
382 15: return true;
383 : }
384 :
385 : ABIArgInfo X86_32ABIInfo::classifyReturnType(QualType RetTy,
386 : ASTContext &Context,
387 1744: llvm::LLVMContext &VMContext) const {
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388 1744: if (RetTy->isVoidType()) {
389 854: return ABIArgInfo::getIgnore();
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390 890: } else if (const VectorType *VT = RetTy->getAs<VectorType>()) {
391 : // On Darwin, some vectors are returned in registers.
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392 51: if (IsDarwinVectorABI) {
393 21: uint64_t Size = Context.getTypeSize(RetTy);
394 :
395 : // 128-bit vectors are a special case; they are returned in
396 : // registers and we need to make sure to pick a type the LLVM
397 : // backend will like.
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398 21: if (Size == 128)
399 : return ABIArgInfo::getCoerce(llvm::VectorType::get(
400 6: llvm::Type::getInt64Ty(VMContext), 2));
401 :
402 : // Always return in register if it fits in a general purpose
403 : // register, or if it is 64 bits and has a single element.
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404 15: if ((Size == 8 || Size == 16 || Size == 32) ||
405 : (Size == 64 && VT->getNumElements() == 1))
406 11: return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size));
407 :
408 4: return ABIArgInfo::getIndirect(0);
409 : }
410 :
411 30: return ABIArgInfo::getDirect();
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412 839: } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) {
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413 100: if (const RecordType *RT = RetTy->getAs<RecordType>()) {
414 : // Structures with either a non-trivial destructor or a non-trivial
415 : // copy constructor are always indirect.
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416 91: if (hasNonTrivialDestructorOrCopyConstructor(RT))
417 10: return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
418 :
419 : // Structures with flexible arrays are always indirect.
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420 81: if (RT->getDecl()->hasFlexibleArrayMember())
421 1: return ABIArgInfo::getIndirect(0);
422 : }
423 :
424 : // If specified, structs and unions are always indirect.
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425 89: if (!IsSmallStructInRegABI && !RetTy->isAnyComplexType())
426 50: return ABIArgInfo::getIndirect(0);
427 :
428 : // Classify "single element" structs as their element type.
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429 39: if (const Type *SeltTy = isSingleElementStruct(RetTy, Context)) {
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430 17: if (const BuiltinType *BT = SeltTy->getAs<BuiltinType>()) {
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431 9: if (BT->isIntegerType()) {
432 : // We need to use the size of the structure, padding
433 : // bit-fields can adjust that to be larger than the single
434 : // element type.
435 1: uint64_t Size = Context.getTypeSize(RetTy);
436 : return ABIArgInfo::getCoerce(
437 1: llvm::IntegerType::get(VMContext, (unsigned) Size));
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438 8: } else if (BT->getKind() == BuiltinType::Float) {
439 : assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) &&
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440 8: "Unexpect single element structure size!");
441 8: return ABIArgInfo::getCoerce(llvm::Type::getFloatTy(VMContext));
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442 0: } else if (BT->getKind() == BuiltinType::Double) {
443 : assert(Context.getTypeSize(RetTy) == Context.getTypeSize(SeltTy) &&
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444 0: "Unexpect single element structure size!");
445 0: return ABIArgInfo::getCoerce(llvm::Type::getDoubleTy(VMContext));
446 : }
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447 8: } else if (SeltTy->isPointerType()) {
448 : // FIXME: It would be really nice if this could come out as the proper
449 : // pointer type.
450 0: const llvm::Type *PtrTy = llvm::Type::getInt8PtrTy(VMContext);
451 0: return ABIArgInfo::getCoerce(PtrTy);
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452 8: } else if (SeltTy->isVectorType()) {
453 : // 64- and 128-bit vectors are never returned in a
454 : // register when inside a structure.
455 6: uint64_t Size = Context.getTypeSize(RetTy);
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456 6: if (Size == 64 || Size == 128)
457 5: return ABIArgInfo::getIndirect(0);
458 :
459 1: return classifyReturnType(QualType(SeltTy, 0), Context, VMContext);
460 : }
461 : }
462 :
463 : // Small structures which are register sized are generally returned
464 : // in a register.
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465 24: if (X86_32ABIInfo::shouldReturnTypeInRegister(RetTy, Context)) {
466 19: uint64_t Size = Context.getTypeSize(RetTy);
467 19: return ABIArgInfo::getCoerce(llvm::IntegerType::get(VMContext, Size));
468 : }
469 :
470 5: return ABIArgInfo::getIndirect(0);
471 : } else {
472 : // Treat an enum type as its underlying type.
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473 739: if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
474 3: RetTy = EnumTy->getDecl()->getIntegerType();
475 :
476 : return (RetTy->isPromotableIntegerType() ?
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477 739: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
478 : }
479 : }
480 :
481 : unsigned X86_32ABIInfo::getIndirectArgumentAlignment(QualType Ty,
482 72: ASTContext &Context) {
483 72: unsigned Align = Context.getTypeAlign(Ty);
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484 72: if (Align < 128) return 0;
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485 1: if (const RecordType* RT = Ty->getAs<RecordType>())
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486 1: if (typeContainsSSEVector(RT->getDecl(), Context))
487 1: return 16;
488 0: return 0;
489 : }
490 :
491 : ABIArgInfo X86_32ABIInfo::classifyArgumentType(QualType Ty,
492 : ASTContext &Context,
493 2318: llvm::LLVMContext &VMContext) const {
494 : // FIXME: Set alignment on indirect arguments.
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495 2318: if (CodeGenFunction::hasAggregateLLVMType(Ty)) {
496 : // Structures with flexible arrays are always indirect.
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497 104: if (const RecordType *RT = Ty->getAs<RecordType>()) {
498 : // Structures with either a non-trivial destructor or a non-trivial
499 : // copy constructor are always indirect.
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500 91: if (hasNonTrivialDestructorOrCopyConstructor(RT))
501 9: return ABIArgInfo::getIndirect(0, /*ByVal=*/false);
502 :
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503 82: if (RT->getDecl()->hasFlexibleArrayMember())
504 : return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty,
505 0: Context));
506 : }
507 :
508 : // Ignore empty structs.
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509 95: if (Ty->isStructureType() && Context.getTypeSize(Ty) == 0)
510 4: return ABIArgInfo::getIgnore();
511 :
512 : // Expand small (<= 128-bit) record types when we know that the stack layout
513 : // of those arguments will match the struct. This is important because the
514 : // LLVM backend isn't smart enough to remove byval, which inhibits many
515 : // optimizations.
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516 91: if (Context.getTypeSize(Ty) <= 4*32 &&
517 : canExpandIndirectArgument(Ty, Context))
518 19: return ABIArgInfo::getExpand();
519 :
520 72: return ABIArgInfo::getIndirect(getIndirectArgumentAlignment(Ty, Context));
521 : } else {
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522 2214: if (const EnumType *EnumTy = Ty->getAs<EnumType>())
523 4: Ty = EnumTy->getDecl()->getIntegerType();
524 :
525 : return (Ty->isPromotableIntegerType() ?
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526 2214: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
527 : }
528 : }
529 :
530 : llvm::Value *X86_32ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
531 5: CodeGenFunction &CGF) const {
532 5: const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
533 5: const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
534 :
535 5: CGBuilderTy &Builder = CGF.Builder;
536 : llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
537 5: "ap");
538 5: llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
539 : llvm::Type *PTy =
540 5: llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
541 5: llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
542 :
543 : uint64_t Offset =
544 5: llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
545 : llvm::Value *NextAddr =
546 : Builder.CreateGEP(Addr, llvm::ConstantInt::get(
547 : llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset),
548 5: "ap.next");
549 5: Builder.CreateStore(NextAddr, VAListAddrAsBPP);
550 :
551 5: return AddrTyped;
552 : }
553 :
554 : namespace {
555 : /// X86_64ABIInfo - The X86_64 ABI information.
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556 134: class X86_64ABIInfo : public ABIInfo {
557 : enum Class {
558 : Integer = 0,
559 : SSE,
560 : SSEUp,
561 : X87,
562 : X87Up,
563 : ComplexX87,
564 : NoClass,
565 : Memory
566 : };
567 :
568 : /// merge - Implement the X86_64 ABI merging algorithm.
569 : ///
570 : /// Merge an accumulating classification \arg Accum with a field
571 : /// classification \arg Field.
572 : ///
573 : /// \param Accum - The accumulating classification. This should
574 : /// always be either NoClass or the result of a previous merge
575 : /// call. In addition, this should never be Memory (the caller
576 : /// should just return Memory for the aggregate).
577 : Class merge(Class Accum, Class Field) const;
578 :
579 : /// classify - Determine the x86_64 register classes in which the
580 : /// given type T should be passed.
581 : ///
582 : /// \param Lo - The classification for the parts of the type
583 : /// residing in the low word of the containing object.
584 : ///
585 : /// \param Hi - The classification for the parts of the type
586 : /// residing in the high word of the containing object.
587 : ///
588 : /// \param OffsetBase - The bit offset of this type in the
589 : /// containing object. Some parameters are classified different
590 : /// depending on whether they straddle an eightbyte boundary.
591 : ///
592 : /// If a word is unused its result will be NoClass; if a type should
593 : /// be passed in Memory then at least the classification of \arg Lo
594 : /// will be Memory.
595 : ///
596 : /// The \arg Lo class will be NoClass iff the argument is ignored.
597 : ///
598 : /// If the \arg Lo class is ComplexX87, then the \arg Hi class will
599 : /// also be ComplexX87.
600 : void classify(QualType T, ASTContext &Context, uint64_t OffsetBase,
601 : Class &Lo, Class &Hi) const;
602 :
603 : /// getCoerceResult - Given a source type \arg Ty and an LLVM type
604 : /// to coerce to, chose the best way to pass Ty in the same place
605 : /// that \arg CoerceTo would be passed, but while keeping the
606 : /// emitted code as simple as possible.
607 : ///
608 : /// FIXME: Note, this should be cleaned up to just take an enumeration of all
609 : /// the ways we might want to pass things, instead of constructing an LLVM
610 : /// type. This makes this code more explicit, and it makes it clearer that we
611 : /// are also doing this for correctness in the case of passing scalar types.
612 : ABIArgInfo getCoerceResult(QualType Ty,
613 : const llvm::Type *CoerceTo,
614 : ASTContext &Context) const;
615 :
616 : /// getIndirectResult - Give a source type \arg Ty, return a suitable result
617 : /// such that the argument will be passed in memory.
618 : ABIArgInfo getIndirectResult(QualType Ty,
619 : ASTContext &Context) const;
620 :
621 : ABIArgInfo classifyReturnType(QualType RetTy,
622 : ASTContext &Context,
623 : llvm::LLVMContext &VMContext) const;
624 :
625 : ABIArgInfo classifyArgumentType(QualType Ty,
626 : ASTContext &Context,
627 : llvm::LLVMContext &VMContext,
628 : unsigned &neededInt,
629 : unsigned &neededSSE) const;
630 :
631 : public:
632 : virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context,
633 : llvm::LLVMContext &VMContext) const;
634 :
635 : virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
636 : CodeGenFunction &CGF) const;
637 : };
638 :
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639 0: class X86_64TargetCodeGenInfo : public TargetCodeGenInfo {
640 : public:
641 134: X86_64TargetCodeGenInfo():TargetCodeGenInfo(new X86_64ABIInfo()) {}
642 : };
643 :
644 : }
645 :
646 : X86_64ABIInfo::Class X86_64ABIInfo::merge(Class Accum,
647 156: Class Field) const {
648 : // AMD64-ABI 3.2.3p2: Rule 4. Each field of an object is
649 : // classified recursively so that always two fields are
650 : // considered. The resulting class is calculated according to
651 : // the classes of the fields in the eightbyte:
652 : //
653 : // (a) If both classes are equal, this is the resulting class.
654 : //
655 : // (b) If one of the classes is NO_CLASS, the resulting class is
656 : // the other class.
657 : //
658 : // (c) If one of the classes is MEMORY, the result is the MEMORY
659 : // class.
660 : //
661 : // (d) If one of the classes is INTEGER, the result is the
662 : // INTEGER.
663 : //
664 : // (e) If one of the classes is X87, X87UP, COMPLEX_X87 class,
665 : // MEMORY is used as class.
666 : //
667 : // (f) Otherwise class SSE is used.
668 :
669 : // Accum should never be memory (we should have returned) or
670 : // ComplexX87 (because this cannot be passed in a structure).
671 : assert((Accum != Memory && Accum != ComplexX87) &&
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156: branch 3 taken
672 156: "Invalid accumulated classification during merge.");
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67: branch 3 taken
673 156: if (Accum == Field || Field == NoClass)
674 89: return Accum;
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67: branch 1 taken
675 67: else if (Field == Memory)
676 0: return Memory;
59: branch 0 taken
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677 67: else if (Accum == NoClass)
678 59: return Field;
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679 8: else if (Accum == Integer || Field == Integer)
680 7: return Integer;
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681 1: else if (Field == X87 || Field == X87Up || Field == ComplexX87 ||
682 : Accum == X87 || Accum == X87Up)
683 1: return Memory;
684 : else
685 0: return SSE;
686 : }
687 :
688 : void X86_64ABIInfo::classify(QualType Ty,
689 : ASTContext &Context,
690 : uint64_t OffsetBase,
691 2528: Class &Lo, Class &Hi) const {
692 : // FIXME: This code can be simplified by introducing a simple value class for
693 : // Class pairs with appropriate constructor methods for the various
694 : // situations.
695 :
696 : // FIXME: Some of the split computations are wrong; unaligned vectors
697 : // shouldn't be passed in registers for example, so there is no chance they
698 : // can straddle an eightbyte. Verify & simplify.
699 :
700 2528: Lo = Hi = NoClass;
701 :
2512: branch 0 taken
16: branch 1 taken
702 2528: Class &Current = OffsetBase < 64 ? Lo : Hi;
703 2528: Current = Memory;
704 :
1247: branch 2 taken
1281: branch 3 taken
705 2528: if (const BuiltinType *BT = Ty->getAs<BuiltinType>()) {
706 1247: BuiltinType::Kind k = BT->getKind();
707 :
752: branch 0 taken
495: branch 1 taken
708 1247: if (k == BuiltinType::Void) {
709 752: Current = NoClass;
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491: branch 3 taken
710 499: } else if (k == BuiltinType::Int128 || k == BuiltinType::UInt128) {
711 4: Lo = Integer;
712 4: Hi = Integer;
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414: branch 2 taken
77: branch 3 taken
713 905: } else if (k >= BuiltinType::Bool && k <= BuiltinType::LongLong) {
714 414: Current = Integer;
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715 147: } else if (k == BuiltinType::Float || k == BuiltinType::Double) {
716 70: Current = SSE;
7: branch 0 taken
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717 7: } else if (k == BuiltinType::LongDouble) {
718 7: Lo = X87;
719 7: Hi = X87Up;
720 : }
721 : // FIXME: _Decimal32 and _Decimal64 are SSE.
722 : // FIXME: _float128 and _Decimal128 are (SSE, SSEUp).
4: branch 2 taken
1277: branch 3 taken
723 1281: } else if (const EnumType *ET = Ty->getAs<EnumType>()) {
724 : // Classify the underlying integer type.
725 4: classify(ET->getDecl()->getIntegerType(), Context, OffsetBase, Lo, Hi);
1120: branch 2 taken
157: branch 3 taken
726 1277: } else if (Ty->hasPointerRepresentation()) {
727 1120: Current = Integer;
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157: branch 3 taken
728 157: } else if (const VectorType *VT = Ty->getAs<VectorType>()) {
729 0: uint64_t Size = Context.getTypeSize(VT);
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730 0: if (Size == 32) {
731 : // gcc passes all <4 x char>, <2 x short>, <1 x int>, <1 x
732 : // float> as integer.
733 0: Current = Integer;
734 :
735 : // If this type crosses an eightbyte boundary, it should be
736 : // split.
737 0: uint64_t EB_Real = (OffsetBase) / 64;
738 0: uint64_t EB_Imag = (OffsetBase + Size - 1) / 64;
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739 0: if (EB_Real != EB_Imag)
740 0: Hi = Lo;
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741 0: } else if (Size == 64) {
742 : // gcc passes <1 x double> in memory. :(
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743 0: if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::Double))
744 0: return;
745 :
746 : // gcc passes <1 x long long> as INTEGER.
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747 0: if (VT->getElementType()->isSpecificBuiltinType(BuiltinType::LongLong))
748 0: Current = Integer;
749 : else
750 0: Current = SSE;
751 :
752 : // If this type crosses an eightbyte boundary, it should be
753 : // split.
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754 0: if (OffsetBase && OffsetBase != 64)
755 0: Hi = Lo;
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756 0: } else if (Size == 128) {
757 0: Lo = SSE;
758 0: Hi = SSEUp;
759 : }
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147: branch 3 taken
760 157: } else if (const ComplexType *CT = Ty->getAs<ComplexType>()) {
761 10: QualType ET = Context.getCanonicalType(CT->getElementType());
762 :
763 10: uint64_t Size = Context.getTypeSize(Ty);
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764 10: if (ET->isIntegralType()) {
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765 6: if (Size <= 64)
766 6: Current = Integer;
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767 0: else if (Size <= 128)
768 0: Lo = Hi = Integer;
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769 4: } else if (ET == Context.FloatTy)
770 4: Current = SSE;
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771 0: else if (ET == Context.DoubleTy)
772 0: Lo = Hi = SSE;
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773 0: else if (ET == Context.LongDoubleTy)
774 0: Current = ComplexX87;
775 :
776 : // If this complex type crosses an eightbyte boundary then it
777 : // should be split.
778 10: uint64_t EB_Real = (OffsetBase) / 64;
779 10: uint64_t EB_Imag = (OffsetBase + Context.getTypeSize(ET)) / 64;
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780 10: if (Hi == NoClass && EB_Real != EB_Imag)
781 0: Hi = Lo;
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140: branch 2 taken
782 147: } else if (const ConstantArrayType *AT = Context.getAsConstantArrayType(Ty)) {
783 : // Arrays are treated like structures.
784 :
785 7: uint64_t Size = Context.getTypeSize(Ty);
786 :
787 : // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
788 : // than two eightbytes, ..., it has class MEMORY.
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7: branch 1 taken
789 7: if (Size > 128)
790 0: return;
791 :
792 : // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
793 : // fields, it has class MEMORY.
794 : //
795 : // Only need to check alignment of array base.
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7: branch 3 taken
796 7: if (OffsetBase % Context.getTypeAlign(AT->getElementType()))
797 0: return;
798 :
799 : // Otherwise implement simplified merge. We could be smarter about
800 : // this, but it isn't worth it and would be harder to verify.
801 7: Current = NoClass;
802 7: uint64_t EltSize = Context.getTypeSize(AT->getElementType());
803 7: uint64_t ArraySize = AT->getSize().getZExtValue();
2: branch 0 taken
7: branch 1 taken
804 9: for (uint64_t i=0, Offset=OffsetBase; i<ArraySize; ++i, Offset += EltSize) {
805 : Class FieldLo, FieldHi;
806 2: classify(AT->getElementType(), Context, Offset, FieldLo, FieldHi);
807 2: Lo = merge(Lo, FieldLo);
808 2: Hi = merge(Hi, FieldHi);
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809 2: if (Lo == Memory || Hi == Memory)
810 0: break;
811 : }
812 :
813 : // Do post merger cleanup (see below). Only case we worry about is Memory.
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7: branch 1 taken
814 7: if (Hi == Memory)
815 0: Lo = Memory;
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7: branch 1 taken
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816 7: assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp array classification.");
127: branch 2 taken
13: branch 3 taken
817 140: } else if (const RecordType *RT = Ty->getAs<RecordType>()) {
818 127: uint64_t Size = Context.getTypeSize(Ty);
819 :
820 : // AMD64-ABI 3.2.3p2: Rule 1. If the size of an object is larger
821 : // than two eightbytes, ..., it has class MEMORY.
3: branch 0 taken
124: branch 1 taken
822 127: if (Size > 128)
823 3: return;
824 :
825 : // AMD64-ABI 3.2.3p2: Rule 2. If a C++ object has either a non-trivial
826 : // copy constructor or a non-trivial destructor, it is passed by invisible
827 : // reference.
18: branch 1 taken
106: branch 2 taken
828 124: if (hasNonTrivialDestructorOrCopyConstructor(RT))
829 18: return;
830 :
831 106: const RecordDecl *RD = RT->getDecl();
832 :
833 : // Assume variable sized types are passed in memory.
0: branch 1 not taken
106: branch 2 taken
834 106: if (RD->hasFlexibleArrayMember())
835 0: return;
836 :
837 106: const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
838 :
839 : // Reset Lo class, this will be recomputed.
840 106: Current = NoClass;
841 :
842 : // If this is a C++ record, classify the bases first.
84: branch 1 taken
22: branch 2 taken
843 106: if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
4: branch 1 taken
84: branch 2 taken
844 172: for (CXXRecordDecl::base_class_const_iterator i = CXXRD->bases_begin(),
845 84: e = CXXRD->bases_end(); i != e; ++i) {
846 : assert(!i->isVirtual() && !i->getType()->isDependentType() &&
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4: branch 6 taken
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847 4: "Unexpected base class!");
848 : const CXXRecordDecl *Base =
849 4: cast<CXXRecordDecl>(i->getType()->getAs<RecordType>()->getDecl());
850 :
851 : // Classify this field.
852 : //
853 : // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate exceeds a
854 : // single eightbyte, each is classified separately. Each eightbyte gets
855 : // initialized to class NO_CLASS.
856 : Class FieldLo, FieldHi;
857 4: uint64_t Offset = OffsetBase + Layout.getBaseClassOffset(Base);
858 4: classify(i->getType(), Context, Offset, FieldLo, FieldHi);
859 4: Lo = merge(Lo, FieldLo);
860 4: Hi = merge(Hi, FieldHi);
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4: branch 3 taken
861 8: if (Lo == Memory || Hi == Memory)
862 0: break;
863 : }
864 :
865 : // If this record has no fields but isn't empty, classify as INTEGER.
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63: branch 3 taken
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63: branch 5 taken
21: branch 6 taken
866 84: if (RD->field_empty() && Size)
867 63: Current = Integer;
868 : }
869 :
870 : // Classify the fields one at a time, merging the results.
871 106: unsigned idx = 0;
74: branch 4 taken
105: branch 5 taken
872 179: for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
873 : i != e; ++i, ++idx) {
874 74: uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
875 74: bool BitField = i->isBitField();
876 :
877 : // AMD64-ABI 3.2.3p2: Rule 1. If ..., or it contains unaligned
878 : // fields, it has class MEMORY.
879 : //
880 : // Note, skip this test for bit-fields, see below.
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72: branch 6 taken
0: branch 7 not taken
74: branch 8 taken
881 74: if (!BitField && Offset % Context.getTypeAlign(i->getType())) {
882 0: Lo = Memory;
883 0: return;
884 : }
885 :
886 : // Classify this field.
887 : //
888 : // AMD64-ABI 3.2.3p2: Rule 3. If the size of the aggregate
889 : // exceeds a single eightbyte, each is classified
890 : // separately. Each eightbyte gets initialized to class
891 : // NO_CLASS.
892 : Class FieldLo, FieldHi;
893 :
894 : // Bit-fields require special handling, they do not force the
895 : // structure to be passed in memory even if unaligned, and
896 : // therefore they can straddle an eightbyte.
2: branch 0 taken
72: branch 1 taken
897 74: if (BitField) {
898 : // Ignore padding bit-fields.
0: branch 2 not taken
2: branch 3 taken
899 2: if (i->isUnnamedBitfield())
900 2: continue;
901 :
902 0: uint64_t Offset = OffsetBase + Layout.getFieldOffset(idx);
903 0: uint64_t Size = i->getBitWidth()->EvaluateAsInt(Context).getZExtValue();
904 :
905 0: uint64_t EB_Lo = Offset / 64;
906 0: uint64_t EB_Hi = (Offset + Size - 1) / 64;
907 0: FieldLo = FieldHi = NoClass;
0: branch 0 not taken
0: branch 1 not taken
908 0: if (EB_Lo) {
0: branch 0 not taken
0: branch 1 not taken
909 0: assert(EB_Hi == EB_Lo && "Invalid classification, type > 16 bytes.");
910 0: FieldLo = NoClass;
911 0: FieldHi = Integer;
912 : } else {
913 0: FieldLo = Integer;
0: branch 0 not taken
0: branch 1 not taken
914 0: FieldHi = EB_Hi ? Integer : NoClass;
915 : }
916 : } else
917 72: classify(i->getType(), Context, Offset, FieldLo, FieldHi);
918 72: Lo = merge(Lo, FieldLo);
919 72: Hi = merge(Hi, FieldHi);
71: branch 0 taken
1: branch 1 taken
0: branch 2 not taken
71: branch 3 taken
920 72: if (Lo == Memory || Hi == Memory)
921 1: break;
922 : }
923 :
924 : // AMD64-ABI 3.2.3p2: Rule 5. Then a post merger cleanup is done:
925 : //
926 : // (a) If one of the classes is MEMORY, the whole argument is
927 : // passed in memory.
928 : //
929 : // (b) If SSEUP is not preceeded by SSE, it is converted to SSE.
930 :
931 : // The first of these conditions is guaranteed by how we implement
932 : // the merge (just bail).
933 : //
934 : // The second condition occurs in the case of unions; for example
935 : // union { _Complex double; unsigned; }.
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106: branch 1 taken
936 106: if (Hi == Memory)
937 0: Lo = Memory;
0: branch 0 not taken
106: branch 1 taken
106: branch 2 taken
106: branch 3 taken
938 106: if (Hi == SSEUp && Lo != SSE)
939 0: Hi = SSE;
940 : }
941 : }
942 :
943 : ABIArgInfo X86_64ABIInfo::getCoerceResult(QualType Ty,
944 : const llvm::Type *CoerceTo,
945 1652: ASTContext &Context) const {
1564: branch 2 taken
88: branch 3 taken
946 1652: if (CoerceTo == llvm::Type::getInt64Ty(CoerceTo->getContext())) {
947 : // Integer and pointer types will end up in a general purpose
948 : // register.
949 :
950 : // Treat an enum type as its underlying type.
4: branch 2 taken
1560: branch 3 taken
951 1564: if (const EnumType *EnumTy = Ty->getAs<EnumType>())
952 4: Ty = EnumTy->getDecl()->getIntegerType();
953 :
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1481: branch 8 taken
83: branch 9 taken
954 1564: if (Ty->isIntegralType() || Ty->hasPointerRepresentation())
955 : return (Ty->isPromotableIntegerType() ?
39: branch 2 taken
1442: branch 3 taken
956 1481: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
65: branch 2 taken
23: branch 3 taken
957 88: } else if (CoerceTo == llvm::Type::getDoubleTy(CoerceTo->getContext())) {
958 : // FIXME: It would probably be better to make CGFunctionInfo only map using
959 : // canonical types than to canonize here.
960 65: QualType CTy = Context.getCanonicalType(Ty);
961 :
962 : // Float and double end up in a single SSE reg.
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61: branch 8 taken
4: branch 9 taken
963 65: if (CTy == Context.FloatTy || CTy == Context.DoubleTy)
964 61: return ABIArgInfo::getDirect();
965 :
966 : }
967 :
968 110: return ABIArgInfo::getCoerce(CoerceTo);
969 : }
970 :
971 : ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty,
972 78: ASTContext &Context) const {
973 : // If this is a scalar LLVM value then assume LLVM will pass it in the right
974 : // place naturally.
41: branch 1 taken
37: branch 2 taken
975 78: if (!CodeGenFunction::hasAggregateLLVMType(Ty)) {
976 : // Treat an enum type as its underlying type.
0: branch 2 not taken
41: branch 3 taken
977 41: if (const EnumType *EnumTy = Ty->getAs<EnumType>())
978 0: Ty = EnumTy->getDecl()->getIntegerType();
979 :
980 : return (Ty->isPromotableIntegerType() ?
1: branch 2 taken
40: branch 3 taken
981 41: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
982 : }
983 :
984 37: bool ByVal = !isRecordWithNonTrivialDestructorOrCopyConstructor(Ty);
985 :
986 : // FIXME: Set alignment correctly.
987 37: return ABIArgInfo::getIndirect(0, ByVal);
988 : }
989 :
990 : ABIArgInfo X86_64ABIInfo::classifyReturnType(QualType RetTy,
991 : ASTContext &Context,
992 1045: llvm::LLVMContext &VMContext) const {
993 : // AMD64-ABI 3.2.3p4: Rule 1. Classify the return type with the
994 : // classification algorithm.
995 : X86_64ABIInfo::Class Lo, Hi;
996 1045: classify(RetTy, Context, 0, Lo, Hi);
997 :
998 : // Check some invariants.
0: branch 0 not taken
1045: branch 1 taken
1045: branch 2 taken
1045: branch 3 taken
999 1045: assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
754: branch 0 taken
291: branch 1 taken
0: branch 2 not taken
754: branch 3 taken
1000 1045: assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification.");
0: branch 0 not taken
1045: branch 1 taken
1045: branch 2 taken
1045: branch 3 taken
1001 1045: assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1002 :
1003 1045: const llvm::Type *ResType = 0;
754: branch 0 taken
0: branch 1 not taken
16: branch 2 taken
263: branch 3 taken
9: branch 4 taken
3: branch 5 taken
0: branch 6 not taken
0: branch 7 not taken
1004 1045: switch (Lo) {
1005 : case NoClass:
1006 754: return ABIArgInfo::getIgnore();
1007 :
1008 : case SSEUp:
1009 : case X87Up:
1010 0: assert(0 && "Invalid classification for lo word.");
1011 :
1012 : // AMD64-ABI 3.2.3p4: Rule 2. Types of class memory are returned via
1013 : // hidden argument.
1014 : case Memory:
1015 16: return getIndirectResult(RetTy, Context);
1016 :
1017 : // AMD64-ABI 3.2.3p4: Rule 3. If the class is INTEGER, the next
1018 : // available register of the sequence %rax, %rdx is used.
1019 : case Integer:
1020 263: ResType = llvm::Type::getInt64Ty(VMContext); break;
1021 :
1022 : // AMD64-ABI 3.2.3p4: Rule 4. If the class is SSE, the next
1023 : // available SSE register of the sequence %xmm0, %xmm1 is used.
1024 : case SSE:
1025 9: ResType = llvm::Type::getDoubleTy(VMContext); break;
1026 :
1027 : // AMD64-ABI 3.2.3p4: Rule 6. If the class is X87, the value is
1028 : // returned on the X87 stack in %st0 as 80-bit x87 number.
1029 : case X87:
1030 3: ResType = llvm::Type::getX86_FP80Ty(VMContext); break;
1031 :
1032 : // AMD64-ABI 3.2.3p4: Rule 8. If the class is COMPLEX_X87, the real
1033 : // part of the value is returned in %st0 and the imaginary part in
1034 : // %st1.
1035 : case ComplexX87:
0: branch 0 not taken
0: branch 1 not taken
1036 0: assert(Hi == ComplexX87 && "Unexpected ComplexX87 classification.");
1037 : ResType = llvm::StructType::get(VMContext, llvm::Type::getX86_FP80Ty(VMContext),
1038 : llvm::Type::getX86_FP80Ty(VMContext),
1039 0: NULL);
1040 : break;
1041 : }
1042 :
0: branch 0 not taken
269: branch 1 taken
2: branch 2 taken
0: branch 3 not taken
0: branch 4 not taken
4: branch 5 taken
0: branch 6 not taken
1043 275: switch (Hi) {
1044 : // Memory was handled previously and X87 should
1045 : // never occur as a hi class.
1046 : case Memory:
1047 : case X87:
1048 0: assert(0 && "Invalid classification for hi word.");
1049 :
1050 : case ComplexX87: // Previously handled.
1051 269: case NoClass: break;
1052 :
1053 : case Integer:
1054 : ResType = llvm::StructType::get(VMContext, ResType,
1055 2: llvm::Type::getInt64Ty(VMContext), NULL);
1056 2: break;
1057 : case SSE:
1058 : ResType = llvm::StructType::get(VMContext, ResType,
1059 0: llvm::Type::getDoubleTy(VMContext), NULL);
1060 0: break;
1061 :
1062 : // AMD64-ABI 3.2.3p4: Rule 5. If the class is SSEUP, the eightbyte
1063 : // is passed in the upper half of the last used SSE register.
1064 : //
1065 : // SSEUP should always be preceeded by SSE, just widen.
1066 : case SSEUp:
0: branch 0 not taken
0: branch 1 not taken
1067 0: assert(Lo == SSE && "Unexpected SSEUp classification.");
1068 0: ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2);
1069 0: break;
1070 :
1071 : // AMD64-ABI 3.2.3p4: Rule 7. If the class is X87UP, the value is
1072 : // returned together with the previous X87 value in %st0.
1073 : case X87Up:
1074 : // If X87Up is preceeded by X87, we don't need to do
1075 : // anything. However, in some cases with unions it may not be
1076 : // preceeded by X87. In such situations we follow gcc and pass the
1077 : // extra bits in an SSE reg.
1: branch 0 taken
3: branch 1 taken
1078 4: if (Lo != X87)
1079 : ResType = llvm::StructType::get(VMContext, ResType,
1080 1: llvm::Type::getDoubleTy(VMContext), NULL);
1081 : break;
1082 : }
1083 :
1084 275: return getCoerceResult(RetTy, ResType, Context);
1085 : }
1086 :
1087 : ABIArgInfo X86_64ABIInfo::classifyArgumentType(QualType Ty, ASTContext &Context,
1088 : llvm::LLVMContext &VMContext,
1089 : unsigned &neededInt,
1090 1401: unsigned &neededSSE) const {
1091 : X86_64ABIInfo::Class Lo, Hi;
1092 1401: classify(Ty, Context, 0, Lo, Hi);
1093 :
1094 : // Check some invariants.
1095 : // FIXME: Enforce these by construction.
0: branch 0 not taken
1401: branch 1 taken
1401: branch 2 taken
1401: branch 3 taken
1096 1401: assert((Hi != Memory || Lo == Memory) && "Invalid memory classification.");
4: branch 0 taken
1397: branch 1 taken
0: branch 2 not taken
4: branch 3 taken
1097 1401: assert((Lo != NoClass || Hi == NoClass) && "Invalid null classification.");
0: branch 0 not taken
1401: branch 1 taken
1401: branch 2 taken
1401: branch 3 taken
1098 1401: assert((Hi != SSEUp || Lo == SSE) && "Invalid SSEUp classification.");
1099 :
1100 1401: neededInt = 0;
1101 1401: neededSSE = 0;
1102 1401: const llvm::Type *ResType = 0;
4: branch 0 taken
20: branch 1 taken
0: branch 2 not taken
1321: branch 3 taken
56: branch 4 taken
0: branch 5 not taken
1103 1401: switch (Lo) {
1104 : case NoClass:
1105 4: return ABIArgInfo::getIgnore();
1106 :
1107 : // AMD64-ABI 3.2.3p3: Rule 1. If the class is MEMORY, pass the argument
1108 : // on the stack.
1109 : case Memory:
1110 :
1111 : // AMD64-ABI 3.2.3p3: Rule 5. If the class is X87, X87UP or
1112 : // COMPLEX_X87, it is passed in memory.
1113 : case X87:
1114 : case ComplexX87:
1115 20: return getIndirectResult(Ty, Context);
1116 :
1117 : case SSEUp:
1118 : case X87Up:
1119 0: assert(0 && "Invalid classification for lo word.");
1120 :
1121 : // AMD64-ABI 3.2.3p3: Rule 2. If the class is INTEGER, the next
1122 : // available register of the sequence %rdi, %rsi, %rdx, %rcx, %r8
1123 : // and %r9 is used.
1124 : case Integer:
1125 1321: ++neededInt;
1126 1321: ResType = llvm::Type::getInt64Ty(VMContext);
1127 1321: break;
1128 :
1129 : // AMD64-ABI 3.2.3p3: Rule 3. If the class is SSE, the next
1130 : // available SSE register is used, the registers are taken in the
1131 : // order from %xmm0 to %xmm7.
1132 : case SSE:
1133 56: ++neededSSE;
1134 56: ResType = llvm::Type::getDoubleTy(VMContext);
1135 : break;
1136 : }
1137 :
0: branch 0 not taken
1360: branch 1 taken
14: branch 2 taken
3: branch 3 taken
0: branch 4 not taken
0: branch 5 not taken
1138 1377: switch (Hi) {
1139 : // Memory was handled previously, ComplexX87 and X87 should
1140 : // never occur as hi classes, and X87Up must be preceed by X87,
1141 : // which is passed in memory.
1142 : case Memory:
1143 : case X87:
1144 : case ComplexX87:
1145 0: assert(0 && "Invalid classification for hi word.");
1146 : break;
1147 :
1148 1360: case NoClass: break;
1149 : case Integer:
1150 : ResType = llvm::StructType::get(VMContext, ResType,
1151 14: llvm::Type::getInt64Ty(VMContext), NULL);
1152 14: ++neededInt;
1153 14: break;
1154 :
1155 : // X87Up generally doesn't occur here (long double is passed in
1156 : // memory), except in situations involving unions.
1157 : case X87Up:
1158 : case SSE:
1159 : ResType = llvm::StructType::get(VMContext, ResType,
1160 3: llvm::Type::getDoubleTy(VMContext), NULL);
1161 3: ++neededSSE;
1162 3: break;
1163 :
1164 : // AMD64-ABI 3.2.3p3: Rule 4. If the class is SSEUP, the
1165 : // eightbyte is passed in the upper half of the last used SSE
1166 : // register.
1167 : case SSEUp:
0: branch 0 not taken
0: branch 1 not taken
1168 0: assert(Lo == SSE && "Unexpected SSEUp classification.");
1169 0: ResType = llvm::VectorType::get(llvm::Type::getDoubleTy(VMContext), 2);
1170 : break;
1171 : }
1172 :
1173 1377: return getCoerceResult(Ty, ResType, Context);
1174 : }
1175 :
1176 : void X86_64ABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context,
1177 1045: llvm::LLVMContext &VMContext) const {
1178 : FI.getReturnInfo() = classifyReturnType(FI.getReturnType(),
1179 1045: Context, VMContext);
1180 :
1181 : // Keep track of the number of assigned registers.
1182 1045: unsigned freeIntRegs = 6, freeSSERegs = 8;
1183 :
1184 : // If the return value is indirect, then the hidden argument is consuming one
1185 : // integer register.
16: branch 2 taken
1029: branch 3 taken
1186 1045: if (FI.getReturnInfo().isIndirect())
1187 16: --freeIntRegs;
1188 :
1189 : // AMD64-ABI 3.2.3p3: Once arguments are classified, the registers
1190 : // get assigned (in left-to-right order) for passing as follows...
1397: branch 2 taken
1045: branch 3 taken
1191 2442: for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
1192 : it != ie; ++it) {
1193 : unsigned neededInt, neededSSE;
1194 : it->info = classifyArgumentType(it->type, Context, VMContext,
1195 1397: neededInt, neededSSE);
1196 :
1197 : // AMD64-ABI 3.2.3p3: If there are no registers available for any
1198 : // eightbyte of an argument, the whole argument is passed on the
1199 : // stack. If registers have already been assigned for some
1200 : // eightbytes of such an argument, the assignments get reverted.
1356: branch 0 taken
41: branch 1 taken
1355: branch 2 taken
1: branch 3 taken
1201 2752: if (freeIntRegs >= neededInt && freeSSERegs >= neededSSE) {
1202 1355: freeIntRegs -= neededInt;
1203 1355: freeSSERegs -= neededSSE;
1204 : } else {
1205 42: it->info = getIndirectResult(it->type, Context);
1206 : }
1207 : }
1208 1045: }
1209 :
1210 : static llvm::Value *EmitVAArgFromMemory(llvm::Value *VAListAddr,
1211 : QualType Ty,
1212 4: CodeGenFunction &CGF) {
1213 : llvm::Value *overflow_arg_area_p =
1214 4: CGF.Builder.CreateStructGEP(VAListAddr, 2, "overflow_arg_area_p");
1215 : llvm::Value *overflow_arg_area =
1216 4: CGF.Builder.CreateLoad(overflow_arg_area_p, "overflow_arg_area");
1217 :
1218 : // AMD64-ABI 3.5.7p5: Step 7. Align l->overflow_arg_area upwards to a 16
1219 : // byte boundary if alignment needed by type exceeds 8 byte boundary.
1220 4: uint64_t Align = CGF.getContext().getTypeAlign(Ty) / 8;
0: branch 0 not taken
4: branch 1 taken
1221 4: if (Align > 8) {
1222 : // Note that we follow the ABI & gcc here, even though the type
1223 : // could in theory have an alignment greater than 16. This case
1224 : // shouldn't ever matter in practice.
1225 :
1226 : // overflow_arg_area = (overflow_arg_area + 15) & ~15;
1227 : llvm::Value *Offset =
1228 0: llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()), 15);
1229 0: overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset);
1230 : llvm::Value *AsInt = CGF.Builder.CreatePtrToInt(overflow_arg_area,
1231 0: llvm::Type::getInt64Ty(CGF.getLLVMContext()));
1232 : llvm::Value *Mask = llvm::ConstantInt::get(
1233 0: llvm::Type::getInt64Ty(CGF.getLLVMContext()), ~15LL);
1234 : overflow_arg_area =
1235 : CGF.Builder.CreateIntToPtr(CGF.Builder.CreateAnd(AsInt, Mask),
1236 : overflow_arg_area->getType(),
1237 0: "overflow_arg_area.align");
1238 : }
1239 :
1240 : // AMD64-ABI 3.5.7p5: Step 8. Fetch type from l->overflow_arg_area.
1241 4: const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
1242 : llvm::Value *Res =
1243 : CGF.Builder.CreateBitCast(overflow_arg_area,
1244 4: llvm::PointerType::getUnqual(LTy));
1245 :
1246 : // AMD64-ABI 3.5.7p5: Step 9. Set l->overflow_arg_area to:
1247 : // l->overflow_arg_area + sizeof(type).
1248 : // AMD64-ABI 3.5.7p5: Step 10. Align l->overflow_arg_area upwards to
1249 : // an 8 byte boundary.
1250 :
1251 4: uint64_t SizeInBytes = (CGF.getContext().getTypeSize(Ty) + 7) / 8;
1252 : llvm::Value *Offset =
1253 : llvm::ConstantInt::get(llvm::Type::getInt32Ty(CGF.getLLVMContext()),
1254 4: (SizeInBytes + 7) & ~7);
1255 : overflow_arg_area = CGF.Builder.CreateGEP(overflow_arg_area, Offset,
1256 4: "overflow_arg_area.next");
1257 4: CGF.Builder.CreateStore(overflow_arg_area, overflow_arg_area_p);
1258 :
1259 : // AMD64-ABI 3.5.7p5: Step 11. Return the fetched type.
1260 4: return Res;
1261 : }
1262 :
1263 : llvm::Value *X86_64ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1264 4: CodeGenFunction &CGF) const {
1265 4: llvm::LLVMContext &VMContext = CGF.getLLVMContext();
1266 4: const llvm::Type *i32Ty = llvm::Type::getInt32Ty(VMContext);
1267 4: const llvm::Type *DoubleTy = llvm::Type::getDoubleTy(VMContext);
1268 :
1269 : // Assume that va_list type is correct; should be pointer to LLVM type:
1270 : // struct {
1271 : // i32 gp_offset;
1272 : // i32 fp_offset;
1273 : // i8* overflow_arg_area;
1274 : // i8* reg_save_area;
1275 : // };
1276 : unsigned neededInt, neededSSE;
1277 : ABIArgInfo AI = classifyArgumentType(Ty, CGF.getContext(), VMContext,
1278 4: neededInt, neededSSE);
1279 :
1280 : // AMD64-ABI 3.5.7p5: Step 1. Determine whether type may be passed
1281 : // in the registers. If not go to step 7.
0: branch 0 not taken
4: branch 1 taken
4: branch 2 taken
4: branch 3 taken
1282 4: if (!neededInt && !neededSSE)
1283 0: return EmitVAArgFromMemory(VAListAddr, Ty, CGF);
1284 :
1285 : // AMD64-ABI 3.5.7p5: Step 2. Compute num_gp to hold the number of
1286 : // general purpose registers needed to pass type and num_fp to hold
1287 : // the number of floating point registers needed.
1288 :
1289 : // AMD64-ABI 3.5.7p5: Step 3. Verify whether arguments fit into
1290 : // registers. In the case: l->gp_offset > 48 - num_gp * 8 or
1291 : // l->fp_offset > 304 - num_fp * 16 go to step 7.
1292 : //
1293 : // NOTE: 304 is a typo, there are (6 * 8 + 8 * 16) = 176 bytes of
1294 : // register save space).
1295 :
1296 4: llvm::Value *InRegs = 0;
1297 4: llvm::Value *gp_offset_p = 0, *gp_offset = 0;
1298 4: llvm::Value *fp_offset_p = 0, *fp_offset = 0;
4: branch 0 taken
0: branch 1 not taken
1299 4: if (neededInt) {
1300 4: gp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 0, "gp_offset_p");
1301 4: gp_offset = CGF.Builder.CreateLoad(gp_offset_p, "gp_offset");
1302 : InRegs =
1303 : CGF.Builder.CreateICmpULE(gp_offset,
1304 : llvm::ConstantInt::get(i32Ty,
1305 : 48 - neededInt * 8),
1306 4: "fits_in_gp");
1307 : }
1308 :
0: branch 0 not taken
4: branch 1 taken
1309 4: if (neededSSE) {
1310 0: fp_offset_p = CGF.Builder.CreateStructGEP(VAListAddr, 1, "fp_offset_p");
1311 0: fp_offset = CGF.Builder.CreateLoad(fp_offset_p, "fp_offset");
1312 : llvm::Value *FitsInFP =
1313 : CGF.Builder.CreateICmpULE(fp_offset,
1314 : llvm::ConstantInt::get(i32Ty,
1315 : 176 - neededSSE * 16),
1316 0: "fits_in_fp");
0: branch 0 not taken
0: branch 1 not taken
1317 0: InRegs = InRegs ? CGF.Builder.CreateAnd(InRegs, FitsInFP) : FitsInFP;
1318 : }
1319 :
1320 4: llvm::BasicBlock *InRegBlock = CGF.createBasicBlock("vaarg.in_reg");
1321 4: llvm::BasicBlock *InMemBlock = CGF.createBasicBlock("vaarg.in_mem");
1322 4: llvm::BasicBlock *ContBlock = CGF.createBasicBlock("vaarg.end");
1323 4: CGF.Builder.CreateCondBr(InRegs, InRegBlock, InMemBlock);
1324 :
1325 : // Emit code to load the value if it was passed in registers.
1326 :
1327 4: CGF.EmitBlock(InRegBlock);
1328 :
1329 : // AMD64-ABI 3.5.7p5: Step 4. Fetch type from l->reg_save_area with
1330 : // an offset of l->gp_offset and/or l->fp_offset. This may require
1331 : // copying to a temporary location in case the parameter is passed
1332 : // in different register classes or requires an alignment greater
1333 : // than 8 for general purpose registers and 16 for XMM registers.
1334 : //
1335 : // FIXME: This really results in shameful code when we end up needing to
1336 : // collect arguments from different places; often what should result in a
1337 : // simple assembling of a structure from scattered addresses has many more
1338 : // loads than necessary. Can we clean this up?
1339 4: const llvm::Type *LTy = CGF.ConvertTypeForMem(Ty);
1340 : llvm::Value *RegAddr =
1341 : CGF.Builder.CreateLoad(CGF.Builder.CreateStructGEP(VAListAddr, 3),
1342 4: "reg_save_area");
4: branch 0 taken
0: branch 1 not taken
0: branch 2 not taken
4: branch 3 taken
1343 4: if (neededInt && neededSSE) {
1344 : // FIXME: Cleanup.
0: branch 1 not taken
0: branch 2 not taken
1345 0: assert(AI.isCoerce() && "Unexpected ABI info for mixed regs");
1346 0: const llvm::StructType *ST = cast<llvm::StructType>(AI.getCoerceToType());
1347 0: llvm::Value *Tmp = CGF.CreateTempAlloca(ST);
0: branch 1 not taken
0: branch 2 not taken
1348 0: assert(ST->getNumElements() == 2 && "Unexpected ABI info for mixed regs");
1349 0: const llvm::Type *TyLo = ST->getElementType(0);
1350 0: const llvm::Type *TyHi = ST->getElementType(1);
1351 : assert((TyLo->isFloatingPoint() ^ TyHi->isFloatingPoint()) &&
0: branch 2 not taken
0: branch 3 not taken
1352 0: "Unexpected ABI info for mixed regs");
1353 0: const llvm::Type *PTyLo = llvm::PointerType::getUnqual(TyLo);
1354 0: const llvm::Type *PTyHi = llvm::PointerType::getUnqual(TyHi);
1355 0: llvm::Value *GPAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
1356 0: llvm::Value *FPAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
0: branch 1 not taken
0: branch 2 not taken
1357 0: llvm::Value *RegLoAddr = TyLo->isFloatingPoint() ? FPAddr : GPAddr;
0: branch 1 not taken
0: branch 2 not taken
1358 0: llvm::Value *RegHiAddr = TyLo->isFloatingPoint() ? GPAddr : FPAddr;
1359 : llvm::Value *V =
1360 0: CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegLoAddr, PTyLo));
1361 0: CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
1362 0: V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegHiAddr, PTyHi));
1363 0: CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
1364 :
1365 : RegAddr = CGF.Builder.CreateBitCast(Tmp,
1366 0: llvm::PointerType::getUnqual(LTy));
4: branch 0 taken
0: branch 1 not taken
1367 4: } else if (neededInt) {
1368 4: RegAddr = CGF.Builder.CreateGEP(RegAddr, gp_offset);
1369 : RegAddr = CGF.Builder.CreateBitCast(RegAddr,
1370 4: llvm::PointerType::getUnqual(LTy));
1371 : } else {
0: branch 0 not taken
0: branch 1 not taken
1372 0: if (neededSSE == 1) {
1373 0: RegAddr = CGF.Builder.CreateGEP(RegAddr, fp_offset);
1374 : RegAddr = CGF.Builder.CreateBitCast(RegAddr,
1375 0: llvm::PointerType::getUnqual(LTy));
1376 : } else {
0: branch 0 not taken
0: branch 1 not taken
1377 0: assert(neededSSE == 2 && "Invalid number of needed registers!");
1378 : // SSE registers are spaced 16 bytes apart in the register save
1379 : // area, we need to collect the two eightbytes together.
1380 0: llvm::Value *RegAddrLo = CGF.Builder.CreateGEP(RegAddr, fp_offset);
1381 : llvm::Value *RegAddrHi =
1382 : CGF.Builder.CreateGEP(RegAddrLo,
1383 0: llvm::ConstantInt::get(i32Ty, 16));
1384 : const llvm::Type *DblPtrTy =
1385 0: llvm::PointerType::getUnqual(DoubleTy);
1386 : const llvm::StructType *ST = llvm::StructType::get(VMContext, DoubleTy,
1387 0: DoubleTy, NULL);
1388 0: llvm::Value *V, *Tmp = CGF.CreateTempAlloca(ST);
1389 : V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrLo,
1390 0: DblPtrTy));
1391 0: CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 0));
1392 : V = CGF.Builder.CreateLoad(CGF.Builder.CreateBitCast(RegAddrHi,
1393 0: DblPtrTy));
1394 0: CGF.Builder.CreateStore(V, CGF.Builder.CreateStructGEP(Tmp, 1));
1395 : RegAddr = CGF.Builder.CreateBitCast(Tmp,
1396 0: llvm::PointerType::getUnqual(LTy));
1397 : }
1398 : }
1399 :
1400 : // AMD64-ABI 3.5.7p5: Step 5. Set:
1401 : // l->gp_offset = l->gp_offset + num_gp * 8
1402 : // l->fp_offset = l->fp_offset + num_fp * 16.
4: branch 0 taken
0: branch 1 not taken
1403 4: if (neededInt) {
1404 4: llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededInt * 8);
1405 : CGF.Builder.CreateStore(CGF.Builder.CreateAdd(gp_offset, Offset),
1406 4: gp_offset_p);
1407 : }
0: branch 0 not taken
4: branch 1 taken
1408 4: if (neededSSE) {
1409 0: llvm::Value *Offset = llvm::ConstantInt::get(i32Ty, neededSSE * 16);
1410 : CGF.Builder.CreateStore(CGF.Builder.CreateAdd(fp_offset, Offset),
1411 0: fp_offset_p);
1412 : }
1413 4: CGF.EmitBranch(ContBlock);
1414 :
1415 : // Emit code to load the value if it was passed in memory.
1416 :
1417 4: CGF.EmitBlock(InMemBlock);
1418 4: llvm::Value *MemAddr = EmitVAArgFromMemory(VAListAddr, Ty, CGF);
1419 :
1420 : // Return the appropriate result.
1421 :
1422 4: CGF.EmitBlock(ContBlock);
1423 : llvm::PHINode *ResAddr = CGF.Builder.CreatePHI(RegAddr->getType(),
1424 4: "vaarg.addr");
1425 4: ResAddr->reserveOperandSpace(2);
1426 4: ResAddr->addIncoming(RegAddr, InRegBlock);
1427 4: ResAddr->addIncoming(MemAddr, InMemBlock);
1428 :
1429 4: return ResAddr;
1430 : }
1431 :
1432 : // PIC16 ABI Implementation
1433 :
1434 : namespace {
1435 :
0: branch 2 not taken
0: branch 3 not taken
0: branch 6 not taken
0: branch 7 not taken
1436 1: class PIC16ABIInfo : public ABIInfo {
1437 : ABIArgInfo classifyReturnType(QualType RetTy,
1438 : ASTContext &Context,
1439 : llvm::LLVMContext &VMContext) const;
1440 :
1441 : ABIArgInfo classifyArgumentType(QualType RetTy,
1442 : ASTContext &Context,
1443 : llvm::LLVMContext &VMContext) const;
1444 :
1445 : virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context,
1446 0: llvm::LLVMContext &VMContext) const {
1447 : FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context,
1448 0: VMContext);
0: branch 2 not taken
0: branch 3 not taken
1449 0: for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
1450 : it != ie; ++it)
1451 0: it->info = classifyArgumentType(it->type, Context, VMContext);
1452 0: }
1453 :
1454 : virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1455 : CodeGenFunction &CGF) const;
1456 : };
1457 :
0: branch 1 not taken
0: branch 2 not taken
0: branch 5 not taken
0: branch 6 not taken
1458 0: class PIC16TargetCodeGenInfo : public TargetCodeGenInfo {
1459 : public:
1460 1: PIC16TargetCodeGenInfo():TargetCodeGenInfo(new PIC16ABIInfo()) {}
1461 : };
1462 :
1463 : }
1464 :
1465 : ABIArgInfo PIC16ABIInfo::classifyReturnType(QualType RetTy,
1466 : ASTContext &Context,
1467 0: llvm::LLVMContext &VMContext) const {
0: branch 2 not taken
0: branch 3 not taken
1468 0: if (RetTy->isVoidType()) {
1469 0: return ABIArgInfo::getIgnore();
1470 : } else {
1471 0: return ABIArgInfo::getDirect();
1472 : }
1473 : }
1474 :
1475 : ABIArgInfo PIC16ABIInfo::classifyArgumentType(QualType Ty,
1476 : ASTContext &Context,
1477 0: llvm::LLVMContext &VMContext) const {
1478 0: return ABIArgInfo::getDirect();
1479 : }
1480 :
1481 : llvm::Value *PIC16ABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1482 0: CodeGenFunction &CGF) const {
1483 0: return 0;
1484 : }
1485 :
1486 : // ARM ABI Implementation
1487 :
1488 : namespace {
1489 :
0: branch 1 not taken
0: branch 2 not taken
0: branch 5 not taken
0: branch 6 not taken
1490 0: class ARMABIInfo : public ABIInfo {
1491 : public:
1492 : enum ABIKind {
1493 : APCS = 0,
1494 : AAPCS = 1,
1495 : AAPCS_VFP
1496 : };
1497 :
1498 : private:
1499 : ABIKind Kind;
1500 :
1501 : public:
1502 7: ARMABIInfo(ABIKind _Kind) : Kind(_Kind) {}
1503 :
1504 : private:
1505 129: ABIKind getABIKind() const { return Kind; }
1506 :
1507 : ABIArgInfo classifyReturnType(QualType RetTy,
1508 : ASTContext &Context,
1509 : llvm::LLVMContext &VMCOntext) const;
1510 :
1511 : ABIArgInfo classifyArgumentType(QualType RetTy,
1512 : ASTContext &Context,
1513 : llvm::LLVMContext &VMContext) const;
1514 :
1515 : virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context,
1516 : llvm::LLVMContext &VMContext) const;
1517 :
1518 : virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1519 : CodeGenFunction &CGF) const;
1520 : };
1521 :
0: branch 1 not taken
0: branch 2 not taken
0: branch 5 not taken
0: branch 6 not taken
1522 0: class ARMTargetCodeGenInfo : public TargetCodeGenInfo {
1523 : public:
1524 7: ARMTargetCodeGenInfo(ARMABIInfo::ABIKind K)
1525 7: :TargetCodeGenInfo(new ARMABIInfo(K)) {}
1526 : };
1527 :
1528 : }
1529 :
1530 : void ARMABIInfo::computeInfo(CGFunctionInfo &FI, ASTContext &Context,
1531 73: llvm::LLVMContext &VMContext) const {
1532 : FI.getReturnInfo() = classifyReturnType(FI.getReturnType(), Context,
1533 73: VMContext);
15: branch 2 taken
73: branch 3 taken
1534 88: for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
1535 : it != ie; ++it) {
1536 15: it->info = classifyArgumentType(it->type, Context, VMContext);
1537 : }
1538 :
1539 : // ARM always overrides the calling convention.
38: branch 1 taken
35: branch 2 taken
0: branch 3 not taken
0: branch 4 not taken
1540 73: switch (getABIKind()) {
1541 : case APCS:
1542 38: FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_APCS);
1543 38: break;
1544 :
1545 : case AAPCS:
1546 35: FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS);
1547 35: break;
1548 :
1549 : case AAPCS_VFP:
1550 0: FI.setEffectiveCallingConvention(llvm::CallingConv::ARM_AAPCS_VFP);
1551 : break;
1552 : }
1553 73: }
1554 :
1555 : ABIArgInfo ARMABIInfo::classifyArgumentType(QualType Ty,
1556 : ASTContext &Context,
1557 15: llvm::LLVMContext &VMContext) const {
11: branch 1 taken
4: branch 2 taken
1558 15: if (!CodeGenFunction::hasAggregateLLVMType(Ty)) {
1559 : // Treat an enum type as its underlying type.
0: branch 2 not taken
11: branch 3 taken
1560 11: if (const EnumType *EnumTy = Ty->getAs<EnumType>())
1561 0: Ty = EnumTy->getDecl()->getIntegerType();
1562 :
1563 : return (Ty->isPromotableIntegerType() ?
0: branch 2 not taken
11: branch 3 taken
1564 11: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1565 : }
1566 :
1567 : // Ignore empty records.
4: branch 1 taken
0: branch 2 not taken
1568 4: if (isEmptyRecord(Context, Ty, true))
1569 4: return ABIArgInfo::getIgnore();
1570 :
1571 : // FIXME: This is kind of nasty... but there isn't much choice because the ARM
1572 : // backend doesn't support byval.
1573 : // FIXME: This doesn't handle alignment > 64 bits.
1574 : const llvm::Type* ElemTy;
1575 : unsigned SizeRegs;
0: branch 1 not taken
0: branch 2 not taken
1576 0: if (Context.getTypeAlign(Ty) > 32) {
1577 0: ElemTy = llvm::Type::getInt64Ty(VMContext);
1578 0: SizeRegs = (Context.getTypeSize(Ty) + 63) / 64;
1579 : } else {
1580 0: ElemTy = llvm::Type::getInt32Ty(VMContext);
1581 0: SizeRegs = (Context.getTypeSize(Ty) + 31) / 32;
1582 : }
1583 0: std::vector<const llvm::Type*> LLVMFields;
1584 0: LLVMFields.push_back(llvm::ArrayType::get(ElemTy, SizeRegs));
1585 0: const llvm::Type* STy = llvm::StructType::get(VMContext, LLVMFields, true);
1586 0: return ABIArgInfo::getCoerce(STy);
1587 : }
1588 :
1589 : static bool isIntegerLikeType(QualType Ty,
1590 : ASTContext &Context,
1591 55: llvm::LLVMContext &VMContext) {
1592 : // APCS, C Language Calling Conventions, Non-Simple Return Values: A structure
1593 : // is called integer-like if its size is less than or equal to one word, and
1594 : // the offset of each of its addressable sub-fields is zero.
1595 :
1596 55: uint64_t Size = Context.getTypeSize(Ty);
1597 :
1598 : // Check that the type fits in a word.
1: branch 0 taken
54: branch 1 taken
1599 55: if (Size > 32)
1600 1: return false;
1601 :
1602 : // FIXME: Handle vector types!
0: branch 2 not taken
54: branch 3 taken
1603 54: if (Ty->isVectorType())
1604 0: return false;
1605 :
1606 : // Float types are never treated as "integer like".
2: branch 2 taken
52: branch 3 taken
1607 54: if (Ty->isRealFloatingType())
1608 2: return false;
1609 :
1610 : // If this is a builtin or pointer type then it is ok.
29: branch 2 taken
23: branch 3 taken
0: branch 6 not taken
29: branch 7 taken
23: branch 8 taken
29: branch 9 taken
1611 52: if (Ty->getAs<BuiltinType>() || Ty->isPointerType())
1612 23: return true;
1613 :
1614 : // Small complex integer types are "integer like".
2: branch 2 taken
27: branch 3 taken
1615 29: if (const ComplexType *CT = Ty->getAs<ComplexType>())
1616 2: return isIntegerLikeType(CT->getElementType(), Context, VMContext);
1617 :
1618 : // Single element and zero sized arrays should be allowed, by the definition
1619 : // above, but they are not.
1620 :
1621 : // Otherwise, it must be a record type.
1622 27: const RecordType *RT = Ty->getAs<RecordType>();
3: branch 0 taken
24: branch 1 taken
1623 27: if (!RT) return false;
1624 :
1625 : // Ignore records with flexible arrays.
1626 24: const RecordDecl *RD = RT->getDecl();
0: branch 1 not taken
24: branch 2 taken
1627 24: if (RD->hasFlexibleArrayMember())
1628 0: return false;
1629 :
1630 : // Check that all sub-fields are at offset 0, and are themselves "integer
1631 : // like".
1632 24: const ASTRecordLayout &Layout = Context.getASTRecordLayout(RD);
1633 :
1634 24: bool HadField = false;
1635 24: unsigned idx = 0;
33: branch 4 taken
15: branch 5 taken
1636 48: for (RecordDecl::field_iterator i = RD->field_begin(), e = RD->field_end();
1637 : i != e; ++i, ++idx) {
1638 33: const FieldDecl *FD = *i;
1639 :
1640 : // Bit-fields are not addressable, we only need to verify they are "integer
1641 : // like". We still have to disallow a subsequent non-bitfield, for example:
1642 : // struct { int : 0; int x }
1643 : // is non-integer like according to gcc.
8: branch 1 taken
25: branch 2 taken
1644 33: if (FD->isBitField()) {
8: branch 1 taken
0: branch 2 not taken
1645 8: if (!RD->isUnion())
1646 8: HadField = true;
1647 :
0: branch 2 not taken
8: branch 3 taken
1648 8: if (!isIntegerLikeType(FD->getType(), Context, VMContext))
1649 0: return false;
1650 :
1651 8: continue;
1652 : }
1653 :
1654 : // Check if this field is at offset 0.
1: branch 1 taken
24: branch 2 taken
1655 25: if (Layout.getFieldOffset(idx) != 0)
1656 1: return false;
1657 :
6: branch 2 taken
18: branch 3 taken
1658 24: if (!isIntegerLikeType(FD->getType(), Context, VMContext))
1659 6: return false;
1660 :
1661 : // Only allow at most one field in a structure. This doesn't match the
1662 : // wording above, but follows gcc in situations with a field following an
1663 : // empty structure.
15: branch 1 taken
3: branch 2 taken
1664 18: if (!RD->isUnion()) {
2: branch 0 taken
13: branch 1 taken
1665 15: if (HadField)
1666 2: return false;
1667 :
1668 13: HadField = true;
1669 : }
1670 : }
1671 :
1672 15: return true;
1673 : }
1674 :
1675 : ABIArgInfo ARMABIInfo::classifyReturnType(QualType RetTy,
1676 : ASTContext &Context,
1677 73: llvm::LLVMContext &VMContext) const {
9: branch 2 taken
64: branch 3 taken
1678 73: if (RetTy->isVoidType())
1679 9: return ABIArgInfo::getIgnore();
1680 :
8: branch 1 taken
56: branch 2 taken
1681 64: if (!CodeGenFunction::hasAggregateLLVMType(RetTy)) {
1682 : // Treat an enum type as its underlying type.
0: branch 2 not taken
8: branch 3 taken
1683 8: if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
1684 0: RetTy = EnumTy->getDecl()->getIntegerType();
1685 :
1686 : return (RetTy->isPromotableIntegerType() ?
2: branch 2 taken
6: branch 3 taken
1687 8: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1688 : }
1689 :
1690 : // Are we following APCS?
28: branch 1 taken
28: branch 2 taken
1691 56: if (getABIKind() == APCS) {
1: branch 1 taken
27: branch 2 taken
1692 28: if (isEmptyRecord(Context, RetTy, false))
1693 1: return ABIArgInfo::getIgnore();
1694 :
1695 : // Complex types are all returned as packed integers.
1696 : //
1697 : // FIXME: Consider using 2 x vector types if the back end handles them
1698 : // correctly.
6: branch 2 taken
21: branch 3 taken
1699 27: if (RetTy->isAnyComplexType())
1700 : return ABIArgInfo::getCoerce(llvm::IntegerType::get(
1701 6: VMContext, Context.getTypeSize(RetTy)));
1702 :
1703 : // Integer like structures are returned in r0.
12: branch 1 taken
9: branch 2 taken
1704 21: if (isIntegerLikeType(RetTy, Context, VMContext)) {
1705 : // Return in the smallest viable integer type.
1706 12: uint64_t Size = Context.getTypeSize(RetTy);
1: branch 0 taken
11: branch 1 taken
1707 12: if (Size <= 8)
1708 1: return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext));
2: branch 0 taken
9: branch 1 taken
1709 11: if (Size <= 16)
1710 2: return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext));
1711 9: return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext));
1712 : }
1713 :
1714 : // Otherwise return in memory.
1715 9: return ABIArgInfo::getIndirect(0);
1716 : }
1717 :
1718 : // Otherwise this is an AAPCS variant.
1719 :
2: branch 1 taken
26: branch 2 taken
1720 28: if (isEmptyRecord(Context, RetTy, true))
1721 2: return ABIArgInfo::getIgnore();
1722 :
1723 : // Aggregates <= 4 bytes are returned in r0; other aggregates
1724 : // are returned indirectly.
1725 26: uint64_t Size = Context.getTypeSize(RetTy);
21: branch 0 taken
5: branch 1 taken
1726 26: if (Size <= 32) {
1727 : // Return in the smallest viable integer type.
1: branch 0 taken
20: branch 1 taken
1728 21: if (Size <= 8)
1729 1: return ABIArgInfo::getCoerce(llvm::Type::getInt8Ty(VMContext));
3: branch 0 taken
17: branch 1 taken
1730 20: if (Size <= 16)
1731 3: return ABIArgInfo::getCoerce(llvm::Type::getInt16Ty(VMContext));
1732 17: return ABIArgInfo::getCoerce(llvm::Type::getInt32Ty(VMContext));
1733 : }
1734 :
1735 5: return ABIArgInfo::getIndirect(0);
1736 : }
1737 :
1738 : llvm::Value *ARMABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1739 0: CodeGenFunction &CGF) const {
1740 : // FIXME: Need to handle alignment
1741 0: const llvm::Type *BP = llvm::Type::getInt8PtrTy(CGF.getLLVMContext());
1742 0: const llvm::Type *BPP = llvm::PointerType::getUnqual(BP);
1743 :
1744 0: CGBuilderTy &Builder = CGF.Builder;
1745 : llvm::Value *VAListAddrAsBPP = Builder.CreateBitCast(VAListAddr, BPP,
1746 0: "ap");
1747 0: llvm::Value *Addr = Builder.CreateLoad(VAListAddrAsBPP, "ap.cur");
1748 : llvm::Type *PTy =
1749 0: llvm::PointerType::getUnqual(CGF.ConvertType(Ty));
1750 0: llvm::Value *AddrTyped = Builder.CreateBitCast(Addr, PTy);
1751 :
1752 : uint64_t Offset =
1753 0: llvm::RoundUpToAlignment(CGF.getContext().getTypeSize(Ty) / 8, 4);
1754 : llvm::Value *NextAddr =
1755 : Builder.CreateGEP(Addr, llvm::ConstantInt::get(
1756 : llvm::Type::getInt32Ty(CGF.getLLVMContext()), Offset),
1757 0: "ap.next");
1758 0: Builder.CreateStore(NextAddr, VAListAddrAsBPP);
1759 :
1760 0: return AddrTyped;
1761 : }
1762 :
1763 : ABIArgInfo DefaultABIInfo::classifyReturnType(QualType RetTy,
1764 : ASTContext &Context,
1765 21: llvm::LLVMContext &VMContext) const {
11: branch 2 taken
10: branch 3 taken
1766 21: if (RetTy->isVoidType()) {
1767 11: return ABIArgInfo::getIgnore();
6: branch 1 taken
4: branch 2 taken
1768 10: } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) {
1769 6: return ABIArgInfo::getIndirect(0);
1770 : } else {
1771 : // Treat an enum type as its underlying type.
0: branch 2 not taken
4: branch 3 taken
1772 4: if (const EnumType *EnumTy = RetTy->getAs<EnumType>())
1773 0: RetTy = EnumTy->getDecl()->getIntegerType();
1774 :
1775 : return (RetTy->isPromotableIntegerType() ?
2: branch 2 taken
2: branch 3 taken
1776 4: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1777 : }
1778 : }
1779 :
1780 : // SystemZ ABI Implementation
1781 :
1782 : namespace {
1783 :
0: branch 2 not taken
0: branch 3 not taken
0: branch 6 not taken
0: branch 7 not taken
1784 0: class SystemZABIInfo : public ABIInfo {
1785 : bool isPromotableIntegerType(QualType Ty) const;
1786 :
1787 : ABIArgInfo classifyReturnType(QualType RetTy, ASTContext &Context,
1788 : llvm::LLVMContext &VMContext) const;
1789 :
1790 : ABIArgInfo classifyArgumentType(QualType RetTy, ASTContext &Context,
1791 : llvm::LLVMContext &VMContext) const;
1792 :
1793 : virtual void computeInfo(CGFunctionInfo &FI, ASTContext &Context,
1794 0: llvm::LLVMContext &VMContext) const {
1795 : FI.getReturnInfo() = classifyReturnType(FI.getReturnType(),
1796 0: Context, VMContext);
0: branch 2 not taken
0: branch 3 not taken
1797 0: for (CGFunctionInfo::arg_iterator it = FI.arg_begin(), ie = FI.arg_end();
1798 : it != ie; ++it)
1799 0: it->info = classifyArgumentType(it->type, Context, VMContext);
1800 0: }
1801 :
1802 : virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1803 : CodeGenFunction &CGF) const;
1804 : };
1805 :
0: branch 1 not taken
0: branch 2 not taken
0: branch 5 not taken
0: branch 6 not taken
1806 0: class SystemZTargetCodeGenInfo : public TargetCodeGenInfo {
1807 : public:
1808 0: SystemZTargetCodeGenInfo():TargetCodeGenInfo(new SystemZABIInfo()) {}
1809 : };
1810 :
1811 : }
1812 :
1813 0: bool SystemZABIInfo::isPromotableIntegerType(QualType Ty) const {
1814 : // SystemZ ABI requires all 8, 16 and 32 bit quantities to be extended.
0: branch 2 not taken
0: branch 3 not taken
1815 0: if (const BuiltinType *BT = Ty->getAs<BuiltinType>())
0: branch 1 not taken
0: branch 2 not taken
1816 0: switch (BT->getKind()) {
1817 : case BuiltinType::Bool:
1818 : case BuiltinType::Char_S:
1819 : case BuiltinType::Char_U:
1820 : case BuiltinType::SChar:
1821 : case BuiltinType::UChar:
1822 : case BuiltinType::Short:
1823 : case BuiltinType::UShort:
1824 : case BuiltinType::Int:
1825 : case BuiltinType::UInt:
1826 0: return true;
1827 : default:
1828 0: return false;
1829 : }
1830 0: return false;
1831 : }
1832 :
1833 : llvm::Value *SystemZABIInfo::EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
1834 0: CodeGenFunction &CGF) const {
1835 : // FIXME: Implement
1836 0: return 0;
1837 : }
1838 :
1839 :
1840 : ABIArgInfo SystemZABIInfo::classifyReturnType(QualType RetTy,
1841 : ASTContext &Context,
1842 0: llvm::LLVMContext &VMContext) const {
0: branch 2 not taken
0: branch 3 not taken
1843 0: if (RetTy->isVoidType()) {
1844 0: return ABIArgInfo::getIgnore();
0: branch 1 not taken
0: branch 2 not taken
1845 0: } else if (CodeGenFunction::hasAggregateLLVMType(RetTy)) {
1846 0: return ABIArgInfo::getIndirect(0);
1847 : } else {
1848 : return (isPromotableIntegerType(RetTy) ?
0: branch 1 not taken
0: branch 2 not taken
1849 0: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1850 : }
1851 : }
1852 :
1853 : ABIArgInfo SystemZABIInfo::classifyArgumentType(QualType Ty,
1854 : ASTContext &Context,
1855 0: llvm::LLVMContext &VMContext) const {
0: branch 1 not taken
0: branch 2 not taken
1856 0: if (CodeGenFunction::hasAggregateLLVMType(Ty)) {
1857 0: return ABIArgInfo::getIndirect(0);
1858 : } else {
1859 : return (isPromotableIntegerType(Ty) ?
0: branch 1 not taken
0: branch 2 not taken
1860 0: ABIArgInfo::getExtend() : ABIArgInfo::getDirect());
1861 : }
1862 : }
1863 :
1864 : // MSP430 ABI Implementation
1865 :
1866 : namespace {
1867 :
0: branch 1 not taken
0: branch 2 not taken
0: branch 5 not taken
0: branch 6 not taken
1868 0: class MSP430TargetCodeGenInfo : public TargetCodeGenInfo {
1869 : public:
1870 0: MSP430TargetCodeGenInfo():TargetCodeGenInfo(new DefaultABIInfo()) {}
1871 : void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
1872 : CodeGen::CodeGenModule &M) const;
1873 : };
1874 :
1875 : }
1876 :
1877 : void MSP430TargetCodeGenInfo::SetTargetAttributes(const Decl *D,
1878 : llvm::GlobalValue *GV,
1879 0: CodeGen::CodeGenModule &M) const {
0: branch 1 not taken
0: branch 2 not taken
1880 0: if (const FunctionDecl *FD = dyn_cast<FunctionDecl>(D)) {
0: branch 1 not taken
0: branch 2 not taken
1881 0: if (const MSP430InterruptAttr *attr = FD->getAttr<MSP430InterruptAttr>()) {
1882 : // Handle 'interrupt' attribute:
1883 0: llvm::Function *F = cast<llvm::Function>(GV);
1884 :
1885 : // Step 1: Set ISR calling convention.
1886 0: F->setCallingConv(llvm::CallingConv::MSP430_INTR);
1887 :
1888 : // Step 2: Add attributes goodness.
1889 0: F->addFnAttr(llvm::Attribute::NoInline);
1890 :
1891 : // Step 3: Emit ISR vector alias.
1892 0: unsigned Num = attr->getNumber() + 0xffe0;
1893 : new llvm::GlobalAlias(GV->getType(), llvm::Function::ExternalLinkage,
1894 : "vector_" +
1895 : llvm::LowercaseString(llvm::utohexstr(Num)),
1896 0: GV, &M.getModule());
1897 : }
1898 : }
1899 0: }
1900 :
1901 4106: const TargetCodeGenInfo &CodeGenModule::getTargetCodeGenInfo() const {
3481: branch 0 taken
625: branch 1 taken
1902 4106: if (TheTargetCodeGenInfo)
1903 3481: return *TheTargetCodeGenInfo;
1904 :
1905 : // For now we just cache the TargetCodeGenInfo in CodeGenModule and don't
1906 : // free it.
1907 :
1908 625: const llvm::Triple &Triple(getContext().Target.getTriple());
9: branch 1 taken
7: branch 2 taken
1: branch 3 taken
0: branch 4 not taken
0: branch 5 not taken
474: branch 6 taken
134: branch 7 taken
1909 625: switch (Triple.getArch()) {
1910 : default:
1911 9: return *(TheTargetCodeGenInfo = new DefaultTargetCodeGenInfo);
1912 :
1913 : case llvm::Triple::arm:
1914 : case llvm::Triple::thumb:
1915 : // FIXME: We want to know the float calling convention as well.
2: branch 3 taken
5: branch 4 taken
1916 7: if (strcmp(getContext().Target.getABI(), "apcs-gnu") == 0)
1917 : return *(TheTargetCodeGenInfo =
1918 2: new ARMTargetCodeGenInfo(ARMABIInfo::APCS));
1919 :
1920 : return *(TheTargetCodeGenInfo =
1921 5: new ARMTargetCodeGenInfo(ARMABIInfo::AAPCS));
1922 :
1923 : case llvm::Triple::pic16:
1924 1: return *(TheTargetCodeGenInfo = new PIC16TargetCodeGenInfo());
1925 :
1926 : case llvm::Triple::systemz:
1927 0: return *(TheTargetCodeGenInfo = new SystemZTargetCodeGenInfo());
1928 :
1929 : case llvm::Triple::msp430:
1930 0: return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo());
1931 :
1932 : case llvm::Triple::x86:
70: branch 1 taken
1: branch 2 taken
403: branch 3 taken
1933 474: switch (Triple.getOS()) {
1934 : case llvm::Triple::Darwin:
1935 : return *(TheTargetCodeGenInfo =
1936 70: new X86_32TargetCodeGenInfo(Context, true, true));
1937 : case llvm::Triple::Cygwin:
1938 : case llvm::Triple::MinGW32:
1939 : case llvm::Triple::MinGW64:
1940 : case llvm::Triple::AuroraUX:
1941 : case llvm::Triple::DragonFly:
1942 : case llvm::Triple::FreeBSD:
1943 : case llvm::Triple::OpenBSD:
1944 : return *(TheTargetCodeGenInfo =
1945 1: new X86_32TargetCodeGenInfo(Context, false, true));
1946 :
1947 : default:
1948 : return *(TheTargetCodeGenInfo =
1949 403: new X86_32TargetCodeGenInfo(Context, false, false));
1950 : }
1951 :
1952 : case llvm::Triple::x86_64:
1953 134: return *(TheTargetCodeGenInfo = new X86_64TargetCodeGenInfo());
1954 : }
1955 : }
Generated: 2010-02-10 01:31 by zcov